Modelling, Stabilization Methods and Power Amplification for Power Hardware-in-Loop Simulation with Improved Accuracy

Abstract

Accurate testing of a device under development, in near to real-life environment, is essential to the rapid growth of emerging technologies such as distributed generation, renewable energy sources, electrical storage, microgrid and electrical vehicles. Power hardware in loop (PHIL) simulation is an emerging methodology which allows for the testing of a physical hardware, i.e., a device under test (DUT), in a safe and controlled environment, without the rest of the system being available. The rest of the system for the DUT is emulated through its mathematical models computed in a real-time simulator (RTS). The DUT and the RTS interact with each other through a power amplifier (PA), which scales up the signals provided by the RTS for the DUT, and sensors. For accurate testing of a DUT, its response in a PHIL simulation should be similar to that in a real-life environment. The two responses are often different due to several factors which are present in a PHIL simulation but not in an actual system. An RTS is a discrete-time domain system while the DUT is a continuous-time domain system. Finite computation time requirement of the RTS and conversion of the continuous-time domain signals to the discretetime domain signals, and vice versa, results in an inaccurate response at high frequencies. Even worse, the PA employed usually introduces additional dynamics into a PHIL simulation and results in inaccuracies at much lower frequencies. The inaccuracy can be so significant that the PHIL simulation of a system can be unstable even though the actual system is stable. This thesis deals with the power amplification required for the accurate replication of the fast transients of a system in a PHIL simulation, accurate modelling of high frequency phenomena of the discrete-time domain characteristics of a PHIL simulation and associated stability analysis, and stabilizing methods for PHIL simulation. Conventional linear PAs employed in a PHIL simulation are too bulky, expensive and lossy to be used at medium to high power applications. Whereas, a conventional filter-based switched-mode PA has a limited dynamic response to emulate fast transients of a system in a PHIL simulation. An output filter-less voltage source inverter is proposed as a high bandwidth PA for a PHIL simulation with inductive DUT. The proposed PA, realized through an IGBT-based PWM converter stack, is utilized to emulate the transients of synchronous generator, including fast transient corresponding to the field excitation controller, while feeding a balanced linear load. Along with a proposed modification to the conventionally used synchronous generator model, in order to include the effects of stator transients, improved accuracy is obtained for unbalanced and non-linear loads also. The applicability of the proposed PA is extended for it to be interfaced to PWM converters by proposing an in-phase synchronization of PWM carriers of the PA and the converter under test. The PA is utilized for testing the control of a three-phase 415 V, 3 kW PWM rectifier For various applications, a PA is required to have power sinking capability, which can be achieved by supplying it from a grid-connected PWM rectifier. A simple input voltage sensor-less vector control of PWM rectifier is proposed in the thesis. While the performance of the proposed method, in terms of THD and power factor, is comparable to the sensorbased method and existing sensor-less methods, its computation time requirement is much lower than those for these methods. The proposed control is validated through simulations and experiments on a three-phase 415 V, 3 kW grid-connected PWM rectifier, generating 800 V dc supply. Conventional continuous-time domain transfer functions of current control loop of a PWM rectifier, and PWM converters in general, do not represent accurately the closed-loop system when the bandwidth of the loop is comparable to the switching frequency of the converter. Third-order reference and disturbance transfer functions of discrete-PI controlled current loop of PWM converters are proposed in the thesis which are utilized to derive closed-form expressions for the current response of the converter for step changes in current reference and voltage disturbance. Consequently, optimized PI-controller parameters are obtained for the fastest disturbance rejection settling time. Further, a pre-filter to the current control loop is proposed to achieve dead-beat reference tracking response. The pre-filter, along with the optimized PI-controller, results in reference tracking and disturbance rejection settling times of two and eight switching cycles, respectively. A PHIL simulation, being a combinational of continuous-time domain and discrete-time domain systems, is conventionally represented using continuous-time models. A discretetime domain model is proposed in the thesis which represents a PHIL simulation much more accurately than the conventional model. The proposed model is used to conduct stability analysis of PHIL simulations. The stability limits in terms of the parameters of the simulated and physical quantities are more accurately estimated through the proposed method as compared to the conventional methods. The stability limits of PHIL simulation are verified through simulations and experiments. Low-pass filter (LPF) based feedback current filtering (FCF) method is widely used for stabilizing an unstable PHIL simulation. The proposed discrete-time domain modelling method is utilized to show that the low-pass filter-based FCF method is ineffective in stabilizing PHIL simulations having highly inductive physical impedances. Phase-lag compensator (PLC) is proposed to be a superior alternative to low-pass filter in such cases. Further, a novel cross-coupled compensator (CCC) is proposed in this thesis. The same is utilized as a filter in FCF method for stabilizing those PHIL simulations where both LPF and PLC are ineffective. CCC-based FCF method is employed for the PHIL simulation of a single machine infinite bus system. The proposed CCC is also utilized for realizing a fault-tolerant synchronous inverter, i.e., a renewable energy source-fed grid tied-inverter which is controlled to act as a synchronous generator. The proposed synchronous inverter draws significantly less current in case of a grid fault as compared to a conventional synchronous inverter and hence avoids damage to the inverter without additional current limiting methods.