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dc.contributor.advisorMathirajan, M
dc.contributor.authorSingh, Rashmi
dc.date.accessioned2018-03-01T15:06:29Z
dc.date.accessioned2018-07-31T06:34:25Z
dc.date.available2018-03-01T15:06:29Z
dc.date.available2018-07-31T06:34:25Z
dc.date.issued2018-03-01
dc.date.submitted2016
dc.identifier.urihttps://etd.iisc.ac.in/handle/2005/3206
dc.identifier.abstracthttp://etd.iisc.ac.in/static/etd/abstracts/4069/G28204-Abs.pdfen_US
dc.description.abstractSince 1970s, ever growing attention has been devoted by worldwide researchers and practitioners to the investigation of job release control. However, the need for control of flow of job/wafer into the wafer fabrication system is identified in the late 1988s. Subsequently, many release policies are developed and presented in the literature for improving its performance with respect to cycle time and throughput. Even though it is pointed out in the literature that there is a need for the development and analysis of policy that control the flow of job/wafer through the manufacturing process, still there is no exhaustive study in view of the previously developed release policies in the literature. Moreover, many new opportunities have evolved in the field of release policy in wafer fabrication industry due to the advancement in technology and computer science. It implies that near real-time decision making for efficient release policy is possible based on the global factory state. However, it appears from the literature that still to date the release policies, which are employed in real wafer fabrication system, are usually based on the static information. Release control/policy is emerging as an important research topic in the wafer fabrication industry given the extremely large capital investment and sales revenue of this industry. Release policy also hold practical significance for manufacturing managers, since neglecting it can lead to wide variations in shop workloads, can cause excessive backlogs, accomplishment of orders will be either too early or too late and there can be frequent need for expediting. All the challenges associated with the performance of the wafer fabrication system discussed here and the puzzle around the release policies and its impact on the wafer fabrication process, this research attempts to investigate existing release policies and proposing a few efficient release policies based on the knowledge gained from the existing release policies strength and weakness. Based on the insights gained from the existing release policies, three new closed loop release policies constant workload (CONSTWL), constant batch machine workload (CONSTBWL) and layer wise control (LWC) are developed by considering the parameters: workload in general, workload in batch machine, and re-entrant characteristics of the wafer fabrication system respectively. The conceptual significance in favour of these proposed closed loop release policies in improving performance of the wafer fabrication system is also outlined in this study. In the literature, few researchers clearly indicate that dispatching rule(s) influence the performance of wafer fabrication system either independently or in integration with release policies. Therefore, to empirically validate this fact, release policy is integrated with dispatching rule particularly applying on bottleneck (discrete processing machine) work station in this study. With these, the aims of proposed release policies are to efficiently improve the system performances in terms of average cycle time, standard deviation of cycle time and throughput. Accordingly, a simulation model is proposed and developed using Arena software for evaluating the performance of release policies in integration with dispatching rule applied on bottleneck work station in wafer fabrication environment. Further, to set the values of parameters in the simulation model, the cause and effect analysis is explored in this study by considering eight critical parameters or factors of the simulated wafer fabrication environment. It includes arrival rate, arrival distribution, processing time, maintenance schedule, operator’s schedule, batch size, dispatching rule and release policy. Simulation based cause and effect analysis not only helps in setting up the values of parameters in the proposed simulation model, but it also helps in strengthening the face validity of the developed simulation model. The verification and validation of the developed simulation model, which is a vital and fundamental aspect of simulation is discussed in detail in this study. Based on the analysis and the results observed from the cause and effect analysis, some modifications are incorporated and subsequently, the parameters values are set in the proposed simulation model for evaluating the performance of release policies integrating with dispatching rules. A series of simulation experiments are conducted using the proposed simulation model with systems conditions such as product mix, complexity of the process, level of machine unreliability, and system congestion level to study the relative effects of each of 18 release policies (one open loop release policy, 14 existing closed loop release policies, and 3 proposed release policies) in integration with dispatching rules (FIFO, LIFO and SRPT), considered in this study, at various throughput levels in the wafer fabrication environment. Particularly, the relative effect of integrating release policies and the dispatching rules are observed and analysed in terms of (a) the effect of dispatching rule on release policy, and (b) the effects of release policies on dispatching rules. It is observed from the overall inferences that dispatching rule: SRPT outperformed both FIFO and LIFO dispatching rule for all the considered release policies, except for the release policy: ‘TOTAL_CT’. Additionally, it is observed that for each of the eighteen release policies integrated with considered, the dispatching rule: SRPT produces less WIP inventory at the bottleneck work station for all throughput levels. The maximum deviation in delay (cycle time) is produced by dispatching rule: LIFO in all the release policies considered except for the release policy: ‘TOTAL_CT’ in which dispatching rule: SRPT produces maximum deviation in delay. Moreover, it is observed that the difference in mean delay with all three dispatching rules (FIFO, LIFO and SRPT) increases with the increase in throughput levels. Furthermore, it is observed that the throughput rate under all release policies (except ‘TOTAL_CT’) is more for dispatching rule: SRPT in comparison with both dispatching rules: FIFO and LIFO for nearly the same threshold values. The experimental results showed that proposed release policy: LWC reliably improves the system performance followed by the proposed release policy: CONSTWL and CONSTBWL with respect to both mean delay and standard deviation for corresponding throughput levels in wafer fabrication system. The characteristics of the proposed release policy: LWC are summarized and the same is presented as follows because this is proven to be best release policy among all the release policies considered in the proposed simulation model. The proposed release policy: LWC is a new measure of the work quantity on the shop floor system, which takes into account the location of jobs/wafers along the production line by employing re-entrant property of wafer fabrication system. As a result, it offers quick response to the stochastic events of the manufacturing system and can compensated the system disturbances in time. The proposed release policy: LWC offers more efficient control of flow of job/wafer in the wafer fabrication system with reduced delay (cycle time) and the standard deviation of delay (cycle time) for a given throughput level in comparison with almost all the release policies considered in this study in integration with all three dispatching rules considered and applied on bottleneck work station. For instance, from the analysis of simulation model, the proposed release policy: LWC reduces the average delay up to 98%, 95%, 90%, 89%, 49%, 35%, 21%, 17%, 13%, 12%, 10%, 9%, 9%, 9%, 6% and 4%, and reduces the standard deviation of delay up to 96%, 98%, 94%, 93%, 34%, 22%, 4%, 13%, 11%, 6%, 9%, 14%, 4%, 4%, 10% and 7% for a given throughput level, respectively in relation to other release polices: FRCP, EWIP, TOTAL_CT, PWR, EWC, DRCP, CONLOAD, WIPLCtrl, Droll, DEC, CONWIP, SA, RCONWIP, WR, CONSTBWL and CONSTWL respectively in integration with dispatching rule: SRPT. These improvements can also be understood from another aspect, that is, LWC can increase the system throughput rate for a given cycle time. The improvement is statistically significant according to the two sample t-test for all throughput values with a 95% confidence level. As the improvement of the proposed release policy: LWC is relatively less on the proposed release policies: CONSTWL and CONSTBWL with respect to mean delay, it can be inferred that the performance of CONSTWL and CONSTBWL is relatively better than other existing closed loop release policies for the scenarios considered in the simulation model. However, the best release policy: LWC provides satisfactory performance in comparison with other release policies for almost all scenarios considered in the simulation model. It is important to note that these proposed release policies can be easily applied in real wafer manufacturing systems because it possesses a simple logic and only the reference level need to be prescribed. The performance of four existing closed release policies that are FRCP, EWIP, TOTAL_CT and PWR are relatively worst in comparison with open loop release policy CONST. This is contradicting to the conclusions given in the literature by many authors that closed loop release policies are always better than open loop release policy with respect to cycle time and throughput measures. In fact, a reasonable closed loop release policy can provide better results than open loop release policy, if its objective and the release parameter are designed carefully, so that the release parameter can respond effectively to the dynamics of the manufacturing system. The reason for worst performance of these four existing closed loop release policies in comparison with open loop release policy and other existing policies is described in detail in this study. In order to see the impact of dispatching rules on a particular work station, batch machine work station, which usually has highest processing time in fabrication process, is considered in this study. The entire simulation experiments are replicated in the same manner except the basis that dispatching rules are applied on batch machine work station instead of bottleneck work station. Based on the analysis of the simulation results, the important observations are as follow: It is observed from the overall inferences that the influence of dispatching rules when applied to batch processing machine (diffusion) work station was not much on individual release policies, since the performance of all three dispatching rules provides nearly same performance at higher throughput level in the proposed simulation model. However, the performances of dispatching rule: SRPT in integration with all release policies considered in this study are summarized here because it produces less mean delay at most of the throughput values. In addition, from the analysis of simulation model, the proposed release policy: LWC reduces the average delay up to 97%, 93%, 87%, 85%, 22%, 17%, 15%, 15%, 13%, 11%, 10%, 10%, 9%, 6%, 6% and 2%, and reduces the standard deviation of delay up to 96%, 97%, 92%, 93%, 21%, 5%, 10%, 2%, 16%, 7%, 14%, 4%, 20%, 10%, 10% and 11% for a given throughput level, respectively in relation to FRCP, EWIP, PWR, TOTAL_CT, EWC, DEC, Droll, CONLOAD, SA, RCONWIP, WIPLCtrl, WR, DRCP, CONWIP, CONSTWL and CONSTBWL in integration with dispatching rule: SRPT, when applied on batch processing machine work station. The improvement is statistically significant according to the two sample t-test for most of the throughput values with a 95% confidence level. It is observed from overall inferences that the performance of all the release policies, considered in this study, in integration with dispatching rule: SRPT is better with respect to both mean delay and standard deviation of delay, when the dispatching rule is applied on the bottleneck (discrete machine, lithography) work station in the proposed simulation model. The performance of most of the release policies, considered in this study, in integration with dispatching rule: LIFO is better with respect to standard deviation of delay, when the dispatching rule is applied on the batch (batch machine, diffusion) work station. These results indicate that there is an influence of dispatching rule on the performance of wafer fabrication system if applied on batch machine work station or on bottleneck work station in integration with release policies. In addition, the effects of dispatching rules are highly dependent upon both the type of release policy used and the work station on which it is applied. Overall, the performance of the proposed release policies is proven to be very effective to system variability’s in scenarios considered in the simulation model. The significant impact of the choice of release policies on wafer manufacturing system performance is justified by the simulation experiments. It can be safely concluded that the efficient closed loop release policies that utilizes system information carefully based on the global factory state data can significantly improve the performance of wafer fabrication system. This thesis provides an extensive literature review covering several aspects of wafer fabrication process. Thereafter, a three new efficient closed loop release policies are developed and their workability are conceptually demonstrated with a framework and a flow diagram. The strength and the weakness of the existing release policies are conceptually highlighted and later it is proven to be true through comprehensive simulation study. A simulation model is developed by considering all the real-life fabrication environment for evaluating the performance of release policies in integration with dispatching rules. Cause and effect analysis is explored in proposed simulation model to set the parameters value. A series of simulation experiments are also constructed to empirically justify the conceptual significance of the proposed release policies.en_US
dc.language.isoen_USen_US
dc.relation.ispartofseriesG28204en_US
dc.subjectJob Release Controlen_US
dc.subjectWafer Fabrication Systemen_US
dc.subjectWafer Fabricationen_US
dc.subjectOpen Loop Release Policiesen_US
dc.subjectClosed Loop Release Policiesen_US
dc.subjectComposite Dispatching Rulesen_US
dc.subjectWafer Fab Systemen_US
dc.subjectJob Flow Controlen_US
dc.subjectRelease Controlen_US
dc.subjectRelease Policiesen_US
dc.subject.classificationManagementen_US
dc.titleInvestigation of Existing Release Policies and Development of a Few Efficient Release Policies for Wafer Fabrication System - A Simulation Approachen_US
dc.typeThesisen_US
dc.degree.namePhDen_US
dc.degree.levelDoctoralen_US
dc.degree.disciplineFaculty of Engineeringen_US


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