Modelling, Fabrication and Characterization of HgCdTe Infrared Detectors for High Operating Temperatures
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In this work, we have designed, simulated, fabricated and characterized homojunction Hg1-xCdxTe detector for high operating temperature in the MWIR region. The IR photon detectors need cryogenic cooling to suppress thermal generation. The temperature of operation in narrow gap semiconductor devices is limited by the noise due to statistical nature of thermal generation-recombination in narrow gap semiconductors. To make IR systems affordable they have to be operated without cooling or with minimal cooling compatible with low cost, low power and long life. Several fundamental and technological limitations to uncooled operation of photon detectors have been discussed in Chapter-1 of this thesis. Way and means adopted to increase the operating temperature, such as non-equilibrium operation, use of multilayer stacked hetero¬structures, optical immersion etc. have also been discussed. Key to improving the detector performance at any temperature is reduction of dark currents to level below the photocurrent and ultimately to the level where detector noise is determined by the fluctuations in photon flux from the scene (BLIP limit). In addition, design of present generation uncooled Hg1-xCdxTe infrared photon detectors relies on complex hetero-structures with a basic unit cell of type n+/π/p+. Theoretical modeling and numerical simulations on TLHJ device consisting of backside illuminated n+/π/p+ photodiodes have been performed. A numerical model for solving carrier transport equations for Hg1-xCdxTe infrared photodiodes was developed in MATLAB. Finite difference discretization of carrier transport equations and successive over relaxation method have been adopted. Numerical models are more appropriate than analytical models when analyzing multi-layer hetero-structures because we can account for realistic doping profiles, compositional grading and hetero-structures using this model. The model can be suitably modified to accommodate different device architectures, designs, material properties and operating temperature. Such a generalized model is useful to a device designer to customize the detector performance as per the availability of the material to suit the application specific requirements. The present work therefore proposes a more flexible, accurate and generalized methodology to accommodate the user needs by simulating the position dependence of carrier concentration, electrostatic potential and g-r rates and their effect on detector performance vis-à¬vis contact doping, absorber doping and absorber width on device performance. We detail aspects of our simulation model by developing a library of Hg1-xCdxTe properties using analytical and empirical expressions for material parameters (energy band gap, electron affinity, intrinsic carrier concentration, carrier effective mass, carrier mobility, dielectric constant and absorption coefficient). The PDEs were solved using the FDM coupled with SOR method. Behavior of Hg1-xCdxTe diodes (homo/hetero-junction) under different biasing, illumination and non equilibrium situations were modeled. Model has been validated for experimental measured data on n on p Hg1-xCdxTe photodiodes. The numerical computations are next applied to simulation/modeling of MWIR (λc=4.5 μm) n+/π/p+ TLHJ device for operation at T=250K. Several recombination processes occur in Hg1¬-xCdxTe depending on material quality, operating temperature, device design and processing conditions. Detailed mathematical models of radiative, Auger, Shockley Read Hall (SRH), surface recombination and optical g-r are analyzed and their effect on carrier lifetime have been evaluated. Analytical models for dark currents affecting the performance of Hg1-xCdxTe diodes at different temperatures are discussed. The mechanisms contributing to dark current are: (i) the thermal diffusion of minority carriers from the neutral regions (IDiff); (ii) generation-recombination from the space charge region of diode (IG-R) (iii) trap assisted tunneling currents, wherein the traps in the depletion region or the traps in the quasi neutral p region close to the depletion edge participate in the tunneling process(ITAT); (iii) band-to-band tunneling currents (IBTB) and (iv) surface leakage currents due to shunt resistance. Total current of a photodiode is ITOT=IDiff+IG-R+ITAT+IBTB+ISH-IP, where IP is the photocurrent. We evaluate the variation of electrostatic potential, carrier concentration, and electric field and g-r profiles as a function of position. The effect of variation in absorber width, doping and contact doping on D* is also analyzed. The mathematical models of different g-r processes (Auger, SRH, radiative, surface recombination and optical generation) affecting the device performance analyzed and their affect on carrier lifetimes are investigated. Responsivity ~3.25Amp-Watt-1, noise current~2pA/Hz1/2 and D* ~8x109 cmHz1/2watt-1 at 0.1V reverse bias have been calculated using optimized values of doping concentration, absorber width and carrier lifetime. The suitability of the method has been illustrated by demonstrating the feasibility of achieving the optimum device performance by carefully selecting the device design and other parameters. The numerical models provided insight about the operation and performance of Hg1-xCdxTe Auger-suppressed infrared photodiodes. Hetero-junction configuration increases the dynamic resistance, while the heavily doped contacts reduce the contact resistance. Wide gap/heavily doped contacts present a barrier to injection of minority carries into the absorber layer. At the same time they allow collection of minority carriers generated in the absorber region at the contacts. Hg1-xCdxTe hetero-diodes are grown by MOCVD and MBE with precise doping and compositional gradient control to reduce g-r contributions from defects and dislocations to the dark current in order to reap advantages of Auger suppression. Measured dark currents in hetero-junction photodiodes continue to be larger than expected in spite of the advancements in MBE technique. Delineation of an array on hetero-structures involves mesa separation of the diodes thus creating additional surface requiring passivation. Overall, the whole effort of fabricating a hetero Hg1-xCdxTe detector array is disproportionate to the overall gain in the performance. Therefore, we employ a much simpler fabrication process of homo-junction Hg1-xCdxTe detectors. It involves a planar device fabrication approach thus minimizing the surface passivation problem. We have deliberated upon the specific growth, characterization techniques and processing steps employed in our study. We discuss some of the experimental issues. We also presented results on the novel processing techniques developed that are potentially applicable to HOT technology and Hg1-xCdxTe technology in general. Hg1-xCdxTe (x=0.27-0.31) layer of ~ 15×15mm2 area and 15-20µm thickness is grown on CdZnTe substrate by Liquid Phase Epitaxy (LPE) in-house. As grown wafer is vacancy doped p-type with a carrier concentration of ~5×1015-1x1016 cm-3 and hole mobility of ~400cm2V-1s-1@80K. Planar n+/ν/p junction ~2-3µm deep is formed by B+ ion implantation and subsequent annealing; details are outlined in Chapter-4. Hall measurements and differential Hall measurements were used to find the carrier concentration, carrier mobility, resistivity of the wafer. The diodes are formed in the form of a 2D array along with various PEV’s for process characterization. Composition of Hg1-xCdxTe wafers used for the work is in the range of 0.27¬ 0.31 as determined by FTIR, corresponding to cutoff wavelength of 4.5-6.5µm. Junction depth and doping profile of the diodes after ion implantation was characterized by differential Hall technique. Transient minority carrier lifetime in fabricated MWIR n+/ν/p Hg1-xCdxTe (x=0.27) diodes were characterized using diode reverse-recovery technique. We prefer this method because it is a direct indicator of device as well as material quality post processing. By this time the device has undergone all the chemical/mechanical treatments and the measured lifetime is the cumulative of g-r mechanisms operative in bulk, space charge region and surface of diode. The value of lifetime extracted from the measured data lies in the range of 80-160ns. Variable temperature lifetime data was also extracted to determine the prevalent g-r process operative in the device. Diode dark I-V and junction C-V measurements were also made to correlate the observed behavior of the measured lifetime with g-r processes. Evidence of Auger suppression at room temperature is seen in the dark I-V characteristics via observation of negative differential resistance in the homo-junction Hg1-xCdxTe diodes. The experimental data is fitted using the numerical and analytical models developed. Based on this fitting, the current mechanisms limiting the dark current in these photodiodes are extracted. An improved analytical I-V model is reported by incorporating TAT and electric field enhanced Shockley-Read-Hall generation recombination process due to dislocations. Tunneling currents are fitted before and after the Auger suppression of carriers with energy level of trap (Et), trap density (Nt) and the doping concentrations of n+ and νregions as fitting parameters. Values of Et and Nt were determined as 0.78-0.80Eg and ~7-9×1014 cm-3 respectively in all cases. Doping concentration of νregion was found to exhibit non-equilibrium depletion from a value of 2×1016 to 4×1015 cm-3. Quantum efficiency of the diodes was found to ~25-30%. Note, that these are wafer level measurements on unpackaged device without backside AR coating. In addition to junction diodes, we present results on several PEV's such as VADA, MIS/MIM capacitors and TLM structures both at room and low temperature. Variable temperature measurements for a VADA tile and subsequent analysis provide evidence of g-r processes originating from defects, dislocations and dislocation loops, which are non-uniformly distributed across the Hg1-xCdxTe wafer and contributes to TAT current at high temperatures. MIS analysis yielded surface charge density lying between 3×1010-1×1011 cm-2 for ZnS/CdTe surface corresponding to a near flat band condition. Results of low and variable temperature measurements on the devices have also been shown to correlate it with the possibility of operating the device at mid temperatures such as 180-250K.
- Physics (PHY) 
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