PWM Techniques for Split-Phase Induction Motor Drive
Abstract
A split-phase induction motor (SPIM) is obtained by splitting each of the three-phase stator windings of an induction motor into two equal halves. This results in two sets of three-phase windings with a spatial angle difference of 30◦ (electrical) between them. The two sets of windings are fed from two different voltage-source inverters for speed control of the split-phase motor drive. Low dc bus voltage requirement and improved torque profile are some of the advantages of the split-phase motor, compared to the normal three-phase induction motor.
A pulse width modulation (PWM) technique is used to produce the gating signals for the power semiconductor devices in the two inverters. The PWM technique can either be a carrier comparison (CC) based method or a space-vector (SV) based scheme. The carrier based PWM methods employ six modulating waves, which are compared against a common triangular carrier to generate the gating pulses. In space-vector based PWM schemes, the voltage reference is specified in terms of a rotating reference vector. In each subcycle, a set of voltage vectors are applied for appropriate durations of time to produce an average vector equal to the reference vector. Unlike three-phase induction motor drives, where the voltage vectors are two dimensional, the voltage vectors in the case of SPIM drive are four dimensional. This thesis presents a detailed survey on carrier-comparison based and space-vector based PWM techniques for the SPIM drive.
In this thesis, sine-triangle PWM (STPWM) is analyzed from a space-vector perspective. The set of voltage vectors applied and the sequence of application of the voltage vectors in each half-carrier cycle are studied. The analysis shows that the set of voltage vectors and the switching sequence employed by STPWM are different from those used by the well known SVPWM tech-niques.
Two other CC based PWM techniques, based on common mode injection, are considered for the SPIM drive. In one method, the common-mode signal is derived from all the six modulating signals, and is the same for both the inverters. In the second method, the common-mode signal is different for the two inverters; each common-mode signal is derived from the three-phase sinusoidal signals of the respective inverter. The study shows that the latter method has the highest dc bus utilization and results in the lowest total harmonic distortion (THD) among the CC PWM techniques.
An experimental comparison of the three carrier-comparison techniques with three well known space-vector PWM techniques is presented. Total harmonic distortion (THD) of the line current is measured at different modulation indices for all six techniques. The experimental results are obtained from a 6kW, 200V, 50Hz split-phase induction motor drive, with constant V /F ratio. The PWM techniques are implemented using an ALTERA cyclone II field programmable gate array (FPGA) digital controller.
One of the SV techniques, termed here as 4-dimensional 24-sector (4D24SEC) PWM is found to be the best in terms of line current THD among all the CC and SV based PWM techniques considered. However, compared to any carrier-based technique, implementation of the 4D24SEC PWM based on the space vector approach is found to be resource intensive. Hence, an equivalent carrier-based implementation of 4D24SEC PWM is proposed in this thesis. The feasibility of the proposed approach is verified experimentally, and is found to be consuming much less logical resources than the space-vector implementation (i.e. 4102 logical elements for the CC approach as against 33,655 logical elements for the SV approach).
A new space-vector PWM technique is also proposed in the thesis. This technique utilizes a new set of voltage vectors and a new switching sequence, which are motivated by the analyses of the carrier-based methods, presented earlier. The proposed technique is implemented, and is compared with other space-vector and carrier-based methods at different modulation indices and switching frequencies. The proposed PWM technique is found to have the same dc-bus utilization as the existing 4-dimensional SV based PWM techniques. The performance of the proposed method is found to be not better than existing 4-dimensional SV PWM methods. The possibilities for new switching sequence is being explored here.