General purpose simulation tool for the performence analysisof ATM Switches

Abstract

The Broadband Integrated Services Digital Network (B-ISDN) supports a wide range of audio, video, and data services within the same network. To cover the widest range of applications possible, B-ISDN should support both circuit-switched and packet-switched services. ATM (Asynchronous Transfer Mode) is the target transport and switching mode approach for providing the desired integration of the various traffic types to be supported by B-ISDN. It is a packet-switched mode of transfer through the network, using fixed-sized 53-byte packets called cells. ATM is a streamlined switching and multiplexing method for B-ISDN. During the last decade, tremendous research effort has been expended to demonstrate the feasibility of ATM switching. A number of commercial ATM chipsets have been developed and deployed. Switching refers to the means by which limited transmission facilities are allocated to users to provide connectivity among them. Traffic characteristics differ from one ATM network to another. QoS (Quality of Service) requirements of users vary from network to network. Hence, while selecting the ATM switch, the network administrator should consider the underlying traffic load and performance requirements so that the network satisfies user QoS requirements and ensures maximum utilization. The performance of ATM switches depends on various factors. Also, for certain sets of performance metrics, some ATM switch architectures are more cost-effective than others. In this thesis, we discuss a General Purpose Simulation Tool for Performance Evaluation of ATM Switches. We first consider different buffering policies and their performance and cost comparisons. We examine Input Queuing, Output Queuing, Shared Memory, and Input-Output Queuing with different internal speed-ups under various mixes of realistic traffic. We also consider buffer management policies to prevent the switch from entering a congested state. First, we examine the Static Threshold Policy, followed by the Dynamic Threshold Policy, where the threshold limits for high and low priority traffic are adjusted according to traffic load. Additionally, we consider per-VC (Virtual Circuit) queuing, where the buffer is logically divided into virtual queues. The logical queue length of each VC is determined by its QoS requirement, such as delay. The ATM switch should satisfy QoS requirements. Per-VC queuing is a useful approach that satisfies the QoS requirements of a connection, independent of the traffic load of other connections. We consider Packet-Based Generalized Processor Sharing as the per-VC queuing scheme. In a Shared Memory Switch, the buffer space is shared among all input ports. These switches are popular due to their desirable performance features and cost-effectiveness. Single-stage shared memory switches provide the lowest delay and highest link utilization. They are also amenable to VLSI implementation. The performance of a shared memory switch depends on buffer management policies, output address distribution, and the assumed traffic model. We consider Static and Adaptive Buffering Policies under different traffic mixes and output addressing scenarios. We present the results of a comprehensive simulation-based performance analysis of shared memory switching architectures. The ATM network must support different applications like Video on Demand, LAN Emulations, and Classical IP over ATM, which require support for multicasting and broadcasting. Multicast traffic can drastically influence switch performance. We have studied the effect of multicast and broadcast traffic on ATM switch performance. Finally, we used our simulation tool to perform a detailed performance analysis of a commercially available ATM switch under heterogeneous traffic. In ATM systems, the desired cell loss probability is of the order of 10?610^{-6}10?6 to 10?1210^{-12}10?12. Thus, conventional Monte Carlo simulation is often not viable. Our tool incorporates a variance reduction technique called Importance Sampling to increase simulation efficiency. This technique has been applied to output queuing for some simple traffic models.