| dc.contributor.advisor | Rajaraman, V | |
| dc.contributor.author | Sarala, A | |
| dc.date.accessioned | 2025-10-07T10:52:06Z | |
| dc.date.available | 2025-10-07T10:52:06Z | |
| dc.date.submitted | 1988 | |
| dc.identifier.uri | https://etd.iisc.ac.in/handle/2005/7159 | |
| dc.description.abstract | Matrix operations play a crucial role in scientific computations. This thesis presents the design and analysis of four parallel matrix computation algorithms specifically suited for a broadcast bus-based Multiple Bus Multiprocessor System (MMS). Additionally, a cost-optimal 3D VLSI algorithm for matrix-matrix multiplication is proposed.
The MMS is a homogeneous private memory multicomputer system. The study includes parallel algorithm designs for the following applications:
(a) Matrix-matrix multiplication
(b) Matrix inversion
(c) Solution of a system of linear equations
(d) Solution of a system of nonlinear equations
Each algorithm is analyzed, and parametric equations for various performance evaluation factors are derived.
All five parallel algorithms presented in this thesis are shown to be cost-optimal. | |
| dc.language.iso | en_US | |
| dc.relation.ispartofseries | T02658 | |
| dc.rights | I grant Indian Institute of Science the right to archive and to make available my thesis or dissertation in whole or in part in all forms of media, now hereafter known. I retain all proprietary rights, such as patent rights. I also retain the right to use in future works (such as articles or books) all or part of this thesis or dissertation | |
| dc.subject | Matrix Multiplication | |
| dc.subject | Multiprocessor Architecture | |
| dc.subject | Performance Analysis | |
| dc.title | Design of parallel algorithms for a multiple bus multiprocessor system. | |
| dc.type | Thesis | |
| dc.degree.level | MSc Engg | |
| dc.degree.level | Masters | |
| dc.degree.grantor | Indian Institute of Science | |
| dc.degree.discipline | Engineering | |
