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dc.contributor.advisorRajaraman, V
dc.contributor.authorJain, Kamal Kumar
dc.date.accessioned2025-10-07T10:51:48Z
dc.date.available2025-10-07T10:51:48Z
dc.date.submitted1993
dc.identifier.urihttps://etd.iisc.ac.in/handle/2005/7138
dc.description.abstractScheduling is a critical challenge in the design of multicomputer systems, especially for minimizing execution time of parallel programs represented as task graphs. This thesis presents both algorithmic and architectural solutions for scheduling task graphs on multiprocessors. It introduces new parallelism measures that more accurately capture exploitable parallelism, and derives improved lower and upper bounds on execution time for directed acyclic graphs (DAGs), assuming zero communication delays. A novel graph partitioning approach is used to establish these bounds, which are shown to be sharper and computationally efficient. A basic scheduling algorithm is proposed, and its performance is proven to match the derived upper bound, demonstrating optimality for complex task graphs beyond tree structures. The thesis also extends these bounds to systems with communication delays, improving upon existing results. Special attention is given to diamond DAGs, common in scientific and numerical applications. These are categorized into four types, and their structural properties are analyzed. Linear-time optimal scheduling algorithms are developed for these graphs, marking the first polynomial-time solutions that account for communication delays. Finally, the thesis introduces ASYFLOW (Asynchronous Task Flow Large Parallel System), an abstract model for large-scale parallel systems. ASYFLOW supports coarse-grain parallelism and features a dynamic, distributed scheduling and load balancing algorithm. It incorporates techniques for memory latency hiding, efficient synchronization, scalable interconnection networks, and performance evaluation. Simulation results demonstrate ASYFLOW’s scalability up to 1024 processors, validating the practical impact of the proposed algorithms and architectural model.
dc.language.isoen_US
dc.relation.ispartofseriesT03491
dc.rightsI grant Indian Institute of Science the right to archive and to make available my thesis or dissertation in whole or in part in all forms of media, now hereafter known. I retain all proprietary rights, such as patent rights. I also retain the right to use in future works (such as articles or books) all or part of this thesis or dissertation
dc.subjectParallelism Measures
dc.subjectDiamond DAGs
dc.subjectASYFLOW Architecture
dc.titleAlgorithmic and architectural solutions for scheduling task graphs on multiprocessors
dc.typeThesis
dc.degree.namePhD
dc.degree.levelDoctoral
dc.degree.grantorIndian Institute of Science
dc.degree.disciplineEngineering


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