A simplified approach for wordlength reduction of control memory of microprogrammed processors

Abstract

Since its inception by Wilkes in 1951, microprogramming has made considerable progress in both techniques and applications. Much of this progress has been made possible by significant improvements in memory technology. Advances in memory technology have resulted in the availability of large, fast, and economical stores from which microprograms can be accessed rapidly. Furthermore, the ability to alter the contents of the control store has renewed interest in interpreters and in high-level language architectures. With the emergence and development of Very Large Scale Integration (VLSI) technology, the general expectation is that microprogramming will play an even larger role in the implementation of complex single-chip processors, largely because of the regularity of the microprogrammed control unit structure. This regularity is not only conducive to the efficient utilization of silicon real estate but is also effective in reducing design time, easing the problem of testing and debugging integrated circuits, and promoting the use of design automation for generating circuit-level designs. Furthermore, in order to enhance system performance, functionality, reliability, and security, many heavily used functions and applications that were previously implemented in software are being migrated into firmware. This leads to much larger and more complex microprograms than were encountered in the past.

Abstract As microprogramming is gathering more importance in computer system design, much attention has been paid to the economic aspect of the microprogrammed control store. In a microprogrammed processor, the size of the control memory depends upon the length (in bits) of the control store word. The word-length reduction techniques attempt to reduce the number of bits in each control store word. As a result, the control store size is reduced. Several methods exist for word-length reduction:

The earliest methods are simple, using obvious techniques such as function extraction. Later formal techniques employ the notions of covering, where classical switching theory is applied.

In all procedures, word-length reduction methods assume that the structure of each microinstruction in terms of various microoperations has already been decided upon in such a way that the parallelism among the microoperations is maintained. Each of the microinstructions so constituted becomes a word of the microprogrammed control memory.

Contribution of the Thesis In this thesis, a new method of reducing the word-length of a microprogrammed control store has been presented. The method is based on a simple and systematic approach, wherein the computation of a limited number of maximal compatibility classes of a subset of microoperations is required. The algorithm is fast and generates minimal solutions in every case.