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    • Division of Electrical, Electronics, and Computer Science (EECS)
    • Electronic Systems Engineering (ESE)
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    Single Phase Grid Connected Converter using Active Power Decoupler with Harmonic Control

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    Thesis full text (3.789Mb)
    Author
    Bhowmick, Sujata
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    Abstract
    The single phase converters are inherently exposed to the pulsating power. The conventional approach to supply this pulsating power is to use a huge Electrolytic capacitor. However, Electrolytic capacitors with high failure rate brings down the overall system lifetime. The Active Power Decoupling (APD) approaches using a set of switches to control the voltage across the storage capacitor, reduces the capacitance requirement many fold. Thereafter, film capacitors, with higher life time, are used to replace the Electrolytic ones. Among many active solutions proposed in the literature, the AC decoupling topologies, stand out due to their adaptability to high power converter. However, the available solutions lead to excessive voltage and current stress on the switches for the applications involving wide range of power factor (PF). Moreover, when the converter supplies the local non-linear load, the power profile contains even order harmonics other than the double frequency component. Therefore, the converter should now be equipped with the control strategy to supply these harmonic powers as well. The present work aims to address the above mentioned issues. First, an APD scheme is proposed which is suitable for high power application and works seamlessly for any PF without overstressing the switches. The proposed topology achieves upto 57% reduction in average curent stress and 41% reduction in DC bus voltage requirement when compared with the existing solutions available. Second, a robust control structure ensuring a stable operation of the converter is developed. With the proposed control, the fundamental control issue of controlling two states with a single control variable is resolved. Also, the control takes care of practical issues suh as model uncertainty, arising out of the component tolerance, drifts etc.. Finally, a control strategy is developed to compensate selected harmonics from the DC bus in presence of non-linear loads. The generation of reference involves simultaneous solution of a set of non-linear equations. The proposed solution achieves the desired harmonic performance with reduced RMS current in the APD branch. In summary, an APD topology with least switch-stress has been proposed, which works seamlessly for any PF. Also, several robust control mechanisms are devised for the situations like system with more states (uncontrollable), polluted grid and non-linear loads
    URI
    https://etd.iisc.ac.in/handle/2005/4865
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    • Electronic Systems Engineering (ESE) [166]

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