| dc.description.abstract | The field of advanced solution processed spin-coated electronics has rapidly expanded over the last few decades towards the development of low-cost, large area and low power consumer electronics for the design of system-on-panel, system-on-glass, and system-on-chip circuits. They have diverse applications such as wearable and textile integrated devices, seamless and twistable systems, soft skin systems, as well as roll-to-roll light-weight, transparent, conformable, stretchable, and even biodegradable systems. So far, all demonstration of solution processed electronics use thin lm transistors (TFT) without any memory. However, memory is an essential electronic component of all systems and it is important to realize floating gate ash memory devices using similar spin-coated solution processing compatible technique. The first demonstration of floating memory by Kahng and Size in 1967 on transparent glass substrates utilized floating metal gate charge storage layers deposited by high temperature vacuum technology. Since then, there has been intensive research on floating gate technology. However, the high temperature and high vacuum technology is incompatible with large area, flexible and low cost electronics due to the process integration issue. Hence the alternative challenge was taken up on developing solution processed spin-coated memory devices for sol-gel electronics.
In this thesis we first introduce different solution processed dielectrics and oxide semi-conductors, thin lm deposition, and behavior at different processing temperatures. Further, we also demonstrate how the band structure of the dielectric, particularly the electron a finity, changes with annealing temperature. Then we propose and demonstrate a new high speed measurement technique for two terminal capacitive devices. In particular, we show that the entire capacitance-voltage curve can be measured in 2.5 s. The measurement is useful for characterization of two terminal capacitive memory devices in terms speed, endurance and retention. This achievement is followed by its application to newly developed fully solution processed, nanoparticle based, robust two terminal memory devices. The link between device performance and its structural and processing parameters such as annealing temperature, thickness of memory layer, supporting dielectric layer and substrate materials, is highlighted. In addition, a detailed analysis and comparison of performance of solution processed memory with regard to state-of-the art processing techniques as well as the selection of materials is presented. This work was extended to achieve the worlds first three terminal fully solution processed inorganic material-based robust ash memory devices with different kinds of solution processed charge trapping layers. We also discuss the advantage of this technology over previously reported sophisticated ultra high vacuum technology based three terminal ash memory devices. Afterwards, we report the discovery of deep level intrinsic traps in solution processed aluminium oxide phosphate. It is also shown that the traps are tunable with the processing temperature. Using XPS and UPS characterization techniques, the origin of these traps is linked with the molecular structure. Utilizing this trap behavior we have fabricated the worlds first fully solution processed ash memory device without tunneling and blocking layers at below 200 C. This discovery may be a breakthrough for large area, solution processed, and flexible electronics applications. Finally, conclusions are drawn on the performance of the memory stack with respect to other processing techniques, along with an outlook for this field and predictions for the future of this technology. | en_US |
