| dc.description.abstract | Photonic Integrated Circuits (PICs) have been primarily developed as application-specific PICs (ASPICs), relying on time-consuming fabrication processes and exhibiting insertion losses between interconnected ASPICs. To address the need for reconfigurability and performance scalability similar to FPGA/multiprocessing-core in electronics, this work explores the development of General-Purpose Microwave Photonic Processors (GPMWPPs). Recent advancements in fabrication technology have enabled the implementation of reconfigurable photonic cores composed of waveguide meshes interconnected via tunable couplers/Mach-Zehnder Interferometers (MZI) and phase shifters. However, these circuits predominantly employ slow thermo-optic tuning, limiting their performance and scalability, thus making them dependent on the high-performance blocks even for simple functions. To address these issues, GPMWPPs need to be implemented using faster electro-optic platforms.
This work explores alternative platforms, namely Lithium Niobate (LN) and Barium Titanate (BTO), which offer large electro-optic coefficients for faster reconfigurability. A detailed theoretical analysis of MZI and phase shifter electrode designs on both LN and BTO platforms has been conducted to evaluate figures of merit, analog and digital performance considering worst-case scenarios to narrow down the gap between theoretical estimation and experimental performance. Considering its advantages, Hexagonal GPMWPP topology is used to implement reconfigurable photonic cores leading to devices oriented in three directions. Due to inherent anisotropy associated with the two platforms and the formation of ferroelectric domains in the BTO platform, the device's performance deteriorates with the change in device orientation and results in a device placement challenge. However, we want all the devices in the GPMWPPs to perform similarly regardless of orientation. Thus, a detailed study on the effects of orientation on the device's performance has been carried out for the two platforms to propose a solution for the device placement challenge. The same solution can also be extended for integrating very large-scale and complex PICs. Comparative analysis of thermo-optic, LN, and BTO platforms is conducted, showing that BTO offers similar circuit performance to the thermo-optic platform.
Once the architecture and platform are fixed, auto-routing algorithms play a crucial role in implementing various functionalities on photonic cores. Thus, in addition to the individual device analysis, an auto-routing algorithm utilizing the depth-first search (DFS) algorithm is proposed for GPMWPPs, enabling the implementation of various functionalities on photonic cores. The algorithm is tested in various scenarios, including path searching, multipath, and cycle detection, demonstrating improved execution speed compared to existing algorithms. The proposed algorithm's broad applicability is verified by implementing it on an N x N network. Additionally, a method to eliminate malfunctioning units without altering the graph is incorporated.
The step-by-step implementation of electro-optically tunable GPMWPPs is comprehensively discussed in this work, encompassing platform selection, device analysis, and auto-routing algorithms. The findings of this work might contribute to advancing the field of reconfigurable photonic cores and pave the way for high-performance, scalable GPMWPP in future communication systems for civil, defence and space applications. | en_US |
