Low Power Machine Learning Systems for Energy Efficient Edge Devices

Abstract

Energy-efficient devices are essential in the world of edge computing and the tiny Machine Learning (tinyML) paradigm. Edge devices are often constrained by the available compu- tational power and hardware resource. To this end, there is a need for systems to implement low-power designs for machine learning at the edge. This research aims at designing edge device deployable low power frameworks honouring the hardware constraints. One such novel system is presented here as an in-filter computing framework that can be used for designing ultra-light classifiers for time-series data. Unlike a conventional pattern recognizer, where the feature extraction and classification are designed independently, this architecture integrates the convo- lution and nonlinear filtering operations directly into the kernels of a Support Vector Machine (SVM). The result of this integration is a template-based SVM whose memory and computa- tional footprint (training and inference) are light enough to be implemented on a constrained IoT platform like microcontrollers or Field Programmable Gate Array (FPGA)-based systems. Template-based SVM do not impose restriction on the SVM kernel to be positive-definite and allows the user to define memory constraint in terms of fixed template vectors. This makes the framework scalable and enables its implementation for low-power, high-density and memory constrained embedded application. Low power computation on resource constrained devices can also be achieved at the implementation level using approximate computing. Multiply- Accumulate (MAC) is one of the most common operations in any design. Multiplication con- sumes more area and power compared to other basic operations. Hence, a novel framework is developed which approximates the multiplication operation to create a multiplierless design. This multiplierless classification framework uses a piecewise linear (PWL) approximation based on a margin propagation (MP) technique and uses only addition/subtraction, shift, compari- son, and register underflow/overflow operations. This results in a hardware-friendly MP-based inference and online training algorithm that can be optimized for any resource constrained edge device. By reusing the same hardware for inference and training, the platform can overcome classification errors and local minima artifacts that result from the MP approximation. Ap- plying this MP approximate computing technique to the template-based in-filter computing iiiAbstract framework, results in an even more energy-efficient system. Based on this principle, a novel MP-based in-filter computing framework is designed that is capable of training and inference of time series data on the edge device with minimal power and area. Using approximate comput- ing techniques for front-end systems like filters and feature extractors results in better energy efficiency. We demonstrate the capabilities of all these frameworks using microcontrollers and FPGA systems. The aim of this research is to enable ultra low power classification capability with online learning for resource constrained edge devices that can be deployed as part of an IoT ecosystem.