Textured Gate Thin Film Transistors and Circuits

Abstract

Reliable, high performance integrated circuits based on thin film transistors (TFTs) on flexible substrates have a lot of advantages, especially in applications like flexible displays, spherical image sensors, wearable devices for health care and communication etc. However, the materials for flexible substrates are temperature sensitive, which limits the fabrication process temperature and hence TFTs have non-crystalline semiconductor films as their active layer. The low transconductance associated with these films and absence of complementary devices often makes circuit design a tedious procedure. Also, TFTs on flexible substrates experience significant mechanical strain due to bending and buckling, which affects their performance. Therefore, a study on the influence of bending on the behavior of TFTs is also essential to design high performance integrated circuits. Bending can alter the electrical properties of TFTs in two ways; it can cause stresses in the Metal-Insulator-Semiconductor (MIS) stack and it can change the electric field distribution due to curvature at the MIS stack. Here, we have developed analytical models that explain the impact of curvature alone on the TFT. The electrostatics of the MIS stack and the current-voltage characteristics of the TFT are obtained by solving Poisson-Boltzmann equation in polar co-ordinates. The results show that the impact of curvature is significant until the radius of curvature is one order more than the insulator thickness (observed during buckling). The analytical models are validated using TCAD simulations performed on amorphous indium gallium zinc oxide TFTs, for which a close match (error less than 2%) is obtained. In the second part of the thesis we have experimentally demonstrated how texturing of gate metal layer influences the transconductance of TFTs. Texturing introduces curvature at the insulator-semiconductor interface and alters the TFT parameters and current-voltage characteristics. This method is advantageous over aspect ratio scaling method, because the latter results in increased layout area and increased overlap capacitance, which in turn limits the resolution and performance of array based active matrix architectures. Instead, textured TFTs permits transconductance modulation even for minimum aspect ratio devices. Experiments are performed on hydrogenated amorphous silicon TFTs for comparing the performance of planar and textured devices. The texturing is realized in the shape of periodic striations oriented along different directions, using a dual gate metal deposition and patterning. The textured TFTs show upto ±40% increase or decrease in transconductance depending on the angle of orientation of texturing as compared to conventional planar TFTs. The influence of texturing on various TFT parameters is also discussed. Detailed analytical models for electrostatics and current voltage characteristics are provided to explain the behavior of textured devices. These models are then compared with experiments which show a good match between the two. The third part of the thesis discusses the use of these textured TFTs for designing circuits with better performance. Common source amplifiers fabricated with textured TFTs show twice the dc gain as compared to planar TFTs without changing the aspect ratio. The last part of the thesis discusses the aspect of threshold voltage instability in TFTs. Both planar and textured TFTs are subjected to threshold voltage shift by biasing them at constant drain and gate bias for one hour. The results show that the angle of orientation of texturing influences the shift in threshold voltage with time