Interplay between the Mechanics of Flexible Substrates and Performance of Thin Film Transistors: Role of Buckled Geometry

Abstract

Buckled Thin Film Transistor (TFT) resulting from the stress induced instability of thin films realized on a exible substrate can behave di erently than that of a planar device. The aim of this thesis is twofold: To understand the in uence of the buckled geometry on the device physics of TFT & How can we use this characteristics to design circuits area e ciently. The study comprises of theoretical estimates, simulations and experimental investgations. Theoretical estimates of the buckled geometry's in uence on the two important variables: unit area gate capacitance Ci and, electrostatic potential ' are presented as a function of the interface curvature. Simulation results to elucidate these estimations are presented. As per the classification followed, the applied stress is fundamental towards the naturally buckled geometry. Drain to source current (IDS) of the Naturally Buckled TFTs (NBTs), as per the theory, depends on the angle between the direction of applied stress and channel. While in the case of the stress perpendicular to the channel, integral of the Ci curve within the wavelength of the NBTs is the governing factor, for stress parallel case, integral of the invese Ci is the governing factor. Simulation results presented in this regards are in agreement with this theory. Extreme assymetricity in the buckling, which is the case of pure bending is also studied. While for the case of the pure bending leading to the field amplification at the channel region, increment in the IDS is expected, for the attenuation case, as per the theory IDS decreases. Simulation results presented in this regards are in agreement with the theory. As per the classification followed, realizing non-planar gate geometry, on top of which TFTs are fabricated is fundamental towards the Artificially Buckled TFTs (ABTs). In case of ABTs, as per the theory, the Ci profile becomes a function of Pitch and Height of the gate geometry's unit element. Such feature of ABTs can in uence the effective layout area of the ABTs. Derived transconductances from the simulated Ið€€€V characteristics are analyzed to elucidate this e ect. Simulated Voltage Transfer Characteristics of the n-channel only CSAs with the ABTs as a load device is in agreemnet with the theory. Experimental results to verify the in uence of artificially buckled geometry on the TFT and amplifier design is presented.