| dc.description.abstract | Silicon-based transistors such as MOSFETs have been the preferred choice for decades now for both power as well as high-frequency device applications. The meteoric rise of Silicon was fuelled by the quest for a highly efficient and low-cost switching device. However, the rate of performance improvement in Silicon-based devices is levelling off over the past few years due to underlying theoretical limits set by fundamental physics. It has become extremely challenging to deliver the performance standards at declining costs consistently. GaN has risen as the most promising alternative to traditional Silicon-based technology. The wide bandgap and ability to conduct carriers at very high mobility infuses a positive momentum to the Moor’s law. The fundamental high electric field strength of the material ensures a significant reduction in device size for a given on-resistance and breakdown voltage. It directly translates to lower effective costs per chip. The existing commercial products with 5-10 times enhanced performance compared to Silicon theoretical limits is a strong motivation to further optimize GaN-based devices for power and RF applications.
Silicon-based devices have long enjoyed the luxury of an established technology development process, which has been optimized over the years via several iterations and efforts. TCAD based design is the stepping-stone for any technology realization. Employing theoretical knowledge and visualizing the physics in real-time for device design or optimization is the heart of the Silicon Industry. The amount of design cost and time saved by following a consistent CAD design to fabrication approach is enormous. On the contrary, GaN-based devices have unique properties and associated design parameters. The conventional Silicon device design knowledge cannot be extrapolated to GaN-based devices. A wide gap exists between the theoretical and reported performance of GaN-based power and RF devices. A systematic design approach is needed, which involves both simulation and experimental analysis. In this thesis, we have developed a consistent design framework extending from TCAD modelling, device fabrication, experimental analyses to circuit-level feasibility. The co-design approach has enabled the exploration of accurate physical behaviour and helped identify the critical design parameters for GaN-based devices [1,2]. This thesis has been divided into the following threads:
In the first part of the work, insights into GaN-based high electron transistors (HEMT) for power and mm-wave applications have been developed. Field Plate technology is the most widely adopted technique for increasing the breakdown voltage in HEMT. In order to achieve optimum performance, it is imperative to scale down the device without compromising the breakdown voltage. However, the conventional lateral field plate configuration is limited by the drift region or gate to drain distance of the device. This issue becomes more severe as the device is scaled down to enhance the on-state performance. This translates to a narrower design window for field plate implementation, which requires more complex and precise lithography alignment. Notably, in the case of RF applications, where the design rules for the lateral device dimensions are rather stringent, the use of a lateral field plate becomes less feasible. Besides, as the device scales down, the contribution of the field plate induced parasitic miller capacitance begins to dominate, resulting in degradation in RF performance parameters such as power gain and cut-off frequency. In order to circumvent these issues, in this thesis, we have proposed two novel field plate architecture- vertical field plate and dual field plate [3,4]. The proposed designs show superior DC, small-signal, and large-signal performance compared to conventional field plate architectures. In addition, various field plate designs have been reported in the past to improve the breakdown performance, namely- source connected, gate connected, and drain connected field plate configurations. However, there is no consensus on the criteria for field plate implementation. The field plate design in HEMT is dependent on the spatial electric field distribution in the channel. Since the electric field is a function of charge distribution across the entire system, the interplay of various charge sources and its implications on field and breakdown voltage must be explored in detail from the device design point of view. Subsequently, we have revealed the interplay of charges (Surface, Polarization and Buffer) and their relative concentrations across the AlGaN/GaN epi-stack governing the electric field distribution and the breakdown mechanism in HEMTs [5]. The investigations are carried out for Schottky, MIS, and p-GaN gate stacks while accounting for possible GaN buffer types (Fe-doped and C-doped). These insights will help to design efficient surface passivation schemes and resolve ambiguities, often observed in experiments, in terms of location of peak electric field (drain side, or gate side, or both) as well as OFF-state conduction and breakdown mechanism (gate injection, or punch-through, or parasitic conduction through buffer or avalanche generation). Besides, these learnings are used to develop unified field plate design guidelines for various scenarios [6].
Attributed to several design/technology/growth parameters to engineer, the design of RF HEMT has become a multi-dimensional engineering problem, which is non-trivial to address from the experimental design of experiments. In this thesis, we have developed an approach for maximizing RF figures of merit parameters of HEMTs, while accounting for design - performance - nonlinearity trade-offs [7,8]. We have investigated the RF performance of a partially recessed architecture by carrying out thorough comparative analyses of design parameters such as barrier type, lateral scaling, and contact resistance. The modelling of mm-wave HEMT enables performance optimization in these devices by employing CAD analysis. The optimized partially recessed architecture has been demonstrated in an RF class A and class AB power amplifier configuration operating from 0.25Thz to 0.6 THz frequency range. It confirms the feasibility of the optimized RF device for various circuit applications [9].
The other key component in any power electronic circuit or THz/mmW system is a Schottky barrier diode. GaN-based heterostructure Schottky Barrier Diodes (SBD), owing to its ability to sustain high electric fields and high temperature while offering exceptionally high current density, low cut-in voltage, has attracted tremendous attention for high power switching applications. In the second part of the thesis, comprehensive TCAD and experimental co-design strategies have been proposed for high power and THz SBD. The critical part of the SBD diode design involves modelling the non-idealities at the Schottky interface and designing physics based process experiments to fix these non-idealities. The fabrication process-induced dangling bonds and interface traps substantially affect the forward and reverse diode performance. These dangling bonds alter the localized energy band level and impact the carrier transport. We have modelled the anode contact interface by accounting for - (1) thin (∼ 5A˚ ) interfacial oxide layer, (2) discrete energy levels in energy band gap due to Nitrogen vacancies, and (3) continuum of trap states due to surface dangling bonds. The trap characteristics such as type, energy levels, and concentration determine the reverse leakage and breakdown voltage. Using the developed physical insights, we then reported (experimentally) an interface engineering technique to reverse the adverse impact of donor interface states on device performance [10]. In this thesis, we also discovered that the impact of Schottky interface quality has a strong correlation to anode recess depth. The Breakdown mechanisms in SBD for unintentionally doped (UID) buffer, Fe-doped buffer, and C-doped buffer are studied. In addition to the impact of anode termination on breakdown voltage, we have also investigated the repercussions of field plate design on other performance figures of merit parameters such as diode current collapse, reverse recovery time, reverse current overshoot, and electro-thermal behaviour [11]. Using the systematic device design approach, we have experimentally demonstrated high power SBD with 15A forward current at 5.5V while having reverse blocking greater than 500V.
SBD diode also finds a wide range of applications in THz frequency detection, frequency multiplication, and mixing. The design metrics for THz SBD vastly differs from the one used for high power applications. It is imperative to account for the impact of associated device parasitic elements at high-frequency operating conditions. The planer, multi-finger SBD topology looks most promising due to the ease of integration and high cut-off frequencies demonstrated. This thesis presents the first report on the design and engineering of multi-finger THz SBD [12]. The study investigates the design metrics of AlN/GaN-based multi-finger, lateral SBD and proposes guidelines to maximize THz operation performance. | en_US |
