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dc.contributor.advisorNandy, S K
dc.contributor.authorBiswas, Arnab Kumar
dc.date.accessioned2016-09-08T07:08:11Z
dc.date.accessioned2018-07-31T04:34:34Z
dc.date.available2016-09-08T07:08:11Z
dc.date.available2018-07-31T04:34:34Z
dc.date.issued2016
dc.date.submitted2016
dc.identifier.urihttps://etd.iisc.ac.in/handle/2005/2554
dc.identifier.abstracthttp://etd.iisc.ac.in/static/etd/abstracts/3321/Arnab-Abs.pdfen_US
dc.description.abstractWith Multiprocessor Systems-on-Chips (MPSoCs) pervading our lives, security issues are emerging as a serious problem and attacks against these systems are becoming more critical and sophisticated. We have designed and implemented different hardware based solutions to ensure security of an MPSoC. Security assisting modules can be implemented at different abstraction levels of an MPSoC design. We propose solutions both at circuit level and system level of abstractions. At the VLSI circuit level abstraction, we consider the problem of presence of noise voltage in input signal coming from outside world. This noise voltage disturbs the normal circuit operation inside a chip causing false logic reception. If the disturbance is caused intentionally the security of a chip may be compromised causing glitch/transient attack. We propose an input receiver with hysteresis characteristic that can work at voltage levels between 0.9V and 5V. The circuit can protect the MPSoC from glitch/transient attack. At the system level, we propose solutions targeting Network-on-Chip (NoC) as the on-chip communication medium. We survey the possible attack scenarios on present-day MPSoCs and investigate a new attack scenario, i.e., router attack targeted toward NoC enabled MPSoC. We propose different monitoring-based countermeasures against routing table-based router attack in an MPSoC having multiple Trusted Execution Environments (TEEs). Software attacks, the most common type of attacks, mainly exploit vulnerabilities like buffer overflow. This is possible if proper access control to memory is absent in the system. We propose four hardware based mechanisms to implement Role Based Access Control (RBAC) model in NoC based MPSoC.en_US
dc.description.sponsorshipMHRD PhD scholarshipen_US
dc.language.isoen_USen_US
dc.subjectNetwork-on-Chip (NoC)en_US
dc.subjectComputer Securityen_US
dc.subjectMultiprocessor Systems-on-Chips (MPSoCs)en_US
dc.subjectMP-SoCen_US
dc.subjectRole Based Access Control (RBAC)en_US
dc.subjectRole Based Shared Memory Access Controlen_US
dc.subjectMPSoCen_US
dc.subject.classificationElectronics Engineeringen_US
dc.titleSecuring Multiprocessor Systems-on-Chipen_US
dc.typeThesisen_US
dc.degree.namePhDen_US
dc.degree.levelDoctoralen_US
dc.degree.disciplineFaculty of Engineeringen_US


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