Now showing items 1-5 of 5
Tiling Stencil Computations To Maximize Parallelism
Stencil computations are iterative kernels often used to simulate the change in a discretized spatial domain overtime (e.g., computational fluid dynamics) or to solve for unknowns in a discretized space by converging to a ...
Compiler-Assisted Energy Optimization For Clustered VLIW Processors
Clustered architecture processors are preferred for embedded systems because centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption. Although clustering helps by ...
Integrating A New Cluster Assignment And Scheduling Algorithm Into An Experimental Retargetable Code Generation Framework
This thesis presents a new uniﬁed algorithm for cluster assignment and acyclic region scheduling in a partitioned architecture, and preliminary results on its integration into an experimental retargetable code generation ...
Neural Architectures For Active Contour Modelling And For Pulse-Encoded Shape Recognition
An innate desire of many vision researchers IS to unravel the mystery of human visual perception Such an endeavor, even ~f it were not wholly successful, is expected to yield byproducts of considerable significance to ...