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    A New Algorithm For Linear Tree Pattern Matching 

    Yuvaraj, Athur Raghuvir (2012-05-03)

    Compiler-Assisted Energy Optimization For Clustered VLIW Processors 

    Nagpal, Rahul (2010-04-13)
    Clustered architecture processors are preferred for embedded systems because centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption. Although clustering helps by ...

    Ranking from Pairwise Comparisons : The Role of the Pairwise Preference Matrix 

    Rajkumar, Arun (2018-07-05)
    Ranking a set of candidates or items from pair-wise comparisons is a fundamental problem that arises in many settings such as elections, recommendation systems, sports team rankings, document rankings and so on. Indeed it ...

    Heterogeneity Aware Shared DRAM Cache for Integrated Heterogeneous Architectures 

    Patil, Adarsh
    Integrated Heterogeneous System (IHS) processors pack throughput-oriented GPGPUs along-side latency-oriented CPUs on the same die sharing certain resources, e.g., shared last level cache, network-on-chip (NoC), and the ...

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    AuthorNagpal, Rahul (1)Patil, Adarsh (1)Rajkumar, Arun (1)Yuvaraj, Athur Raghuvir (1)Subject
    Algorithms (4)
    Computer Science (4)
    Bank Level Parallelism (BLP) (1)Binary Choice Polytope (BCP) (1)Bradley Terry Luce Condition (1)Bradley-Terry-Luce (BTL) (1)Clustered VLIW Architectures (1)Clustered VLIW Processors (1)Computer Architecture (1)Computer Programs (1)... View MoreDate Issued2010 (1)2012 (1)2018 (1)Has File(s)Yes (4)

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