Investigations On PWM Signal Generation And Common Mode Voltage Elimination Schemes For Multi-Level Inverter Fed Induction Motor Drives
dc.contributor.advisor | Gopakumar, K | |
dc.contributor.author | Kanchan, Rahul Sudam | |
dc.date.accessioned | 2011-09-08T05:03:03Z | |
dc.date.accessioned | 2018-07-31T04:34:11Z | |
dc.date.available | 2011-09-08T05:03:03Z | |
dc.date.available | 2018-07-31T04:34:11Z | |
dc.date.issued | 2011-09-08 | |
dc.date.submitted | 2005 | |
dc.identifier.uri | https://etd.iisc.ac.in/handle/2005/1405 | |
dc.identifier.abstract | http://etd.iisc.ac.in/static/etd/abstracts/1814/G19179-Abs.pdf | en_US |
dc.language.iso | en_US | en_US |
dc.relation.ispartofseries | G19179 | en_US |
dc.subject | Induction Motors | en_US |
dc.subject | Inverters | en_US |
dc.subject | Multi-Level Inverters | en_US |
dc.subject | Pulse Width Modulation (PWM) | en_US |
dc.subject | Induction Motor Drives | en_US |
dc.subject | Space Vector Pulse Width Modulation (SVPWM) | en_US |
dc.subject | Direct Current Electric Motors | en_US |
dc.subject | Induction Motor Drive | en_US |
dc.subject | Sinusoidal Pulse Width Modulation (SPWM) | en_US |
dc.subject.classification | Heat Engineering | en_US |
dc.title | Investigations On PWM Signal Generation And Common Mode Voltage Elimination Schemes For Multi-Level Inverter Fed Induction Motor Drives | en_US |
dc.type | Thesis | en_US |
dc.degree.name | PhD | en_US |
dc.degree.level | Doctoral | en_US |
dc.degree.discipline | Faculty of Engineering | en_US |