Browsing by Author "Raghavendra, R G"
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Summer-Less Dual Charge Pump Based PLL With Wide Lock Range Using Analog Frequency Detector
Raghavendra, R G (2011-01-18)Phase Locked Loop (PLL) is an integral component of clock generation circuits. A third order Charge Pump PLL (CPPLL) is most widely employed PLL architecture due to its zero steady state phase error. A monolithic implementation ...