Browsing by Advisor "Nandy, S K"
Now showing items 21-37 of 37
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Hardware-Software Co-Design Accelerators for Sparse BLAS
Sparse Basic Linear Algebra Subroutines (Sparse BLAS) is an important library. Sparse BLAS includes three levels of subroutines. Level 1, Level2 and Level 3 Sparse BLAS routines. Level 1 Sparse BLAS routines do computations ... -
A Novel Algorithm-Architecture Co-Designed System for Dynamic Execution-Driven Pre-Silicon Verification
In EDA industry, design-under-test (DUT) is a pre-silicon digital design which is still undergoing testing phase. We perform functional-verification of a DUT to verify whether the DUT conforms to the specifications. Functional ... -
Novel Neural Architectures based on Recurrent Connections and Symmetric Filters for Visual Processing
Artificial Neural Networks (ANN) have been very successful due to their ability to extract meaningful information without any need for pre-processing raw data. First artificial neural networks were created in essence to ... -
On the effectiveness of exploiting instruction level reuse in superscalar microprocessor : Power-performance prespective
Modern microprocessors exploit Instruction Level Parallelism (ILP) by employing substantial on-chip resources and incorporating microarchitectural features that exploit properties of programs. Among program attributes, ... -
On The Issues Of Supporting On-Demand Streaming Application Over Peer-to-Peer Networks
(2009-06-17)Bandwidth and resource constraints at the server side is a limitation for deployment of streaming media applications. Resource constraints at the server side often leads to saturation of resources during sudden increase ... -
Optimizing Matrix Multiplication for the REDEFINE Many-Core Co-processor
Matrix-matrix multiplication is an important operation for many applications and hence it is required to be parallelized optimally for the architecture the applications will run on. REDE- FINE is a many-core co-processor ... -
Polymorphic ASIC : For Video Decoding
(2018-03-21)Video applications are becoming ubiquitous in recent times due to an explosion in the number of devices with video capture and display capabilities. Traditionally, video applications are implemented on a variety of devices ... -
A Polymorphic Finite Field Multiplier
(2013-07-03)Cryptography algorithms like the Advanced Encryption Standard, Elliptic Curve Cryptography algorithms etc are designed using algebraic properties of finite fields. Thus performance of these algorithms depend on performance ... -
Power Grid Analysis In VLSI Designs
(2009-05-18)Power has become an important design closure parameter in today’s ultra low submicron digital designs. The impact of the increase in power is multi-discipline to researchers ranging from power supply design, power converters ... -
Reconfigurable Accelerator for High Performance Application Kernels
Accelerating high performance computing (HPC) applications such as dense linear al- gebra solvers, mesh computations, stencil computations requires exploiting parallelism that is resident in loops. Typically these loops ... -
RETHROTTLE : Execution Throttling In The REDEFINE SoC Architecture
(2011-01-20)REDEFINE is a reconfigurable SoC architecture that provides a unique platform for high performance and low power computing by exploiting the synergistic interaction between coarse grain dynamic dataflow model of computation ... -
Securing Multiprocessor Systems-on-Chip
(2016)With Multiprocessor Systems-on-Chips (MPSoCs) pervading our lives, security issues are emerging as a serious problem and attacks against these systems are becoming more critical and sophisticated. We have designed and ... -
Speculative trace scheduling of binary translated code in vliw processors
Very Long Instruction Word (VLIW) processors are well known for their high compute capacity and simple hardware. Because of these properties, these processors are very popular in the embedded processing domain. With the ... -
Static Analysis and Dynamic Monitoring of Program Flow on REDEFINE Manycore Processor
Manycore heterogeneous architectures are becoming the promising choice for high-performance computing applications. Multiple parallel tasks run concurrently across different processor cores sharing the same communication ... -
System virtualization in the multi-core era-a Q0S perspective
The emergence of multi-core servers and the growing need for green computing have led to the resurgence of system virtualization. System virtualization has re-emerged as a solution to many critical challenges faced by ...