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    RETHROTTLE : Execution Throttling In The REDEFINE SoC Architecture 

    Satrawala, Amar Nath (2011-01-20)
    REDEFINE is a reconfigurable SoC architecture that provides a unique platform for high performance and low power computing by exploiting the synergistic interaction between coarse grain dynamic dataflow model of computation ...

    Adaptive Grid Meta Scheduling - A QoS Perspective 

    Nainwal, Kalash Chandra (2011-09-06)

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    AuthorNainwal, Kalash Chandra (1)Satrawala, Amar Nath (1)Subject
    Computer Architecture (2)
    Computer Science (2)
    Adaptive Grid Meta Scheduling (1)Coarse Grain (1)Computer Architecture - Modeling (1)Computer Simulation (1)Computer Software - Development (1)Computer Software - Distributed Processing (1)Dataflow Models (1)Grid Architecture (1)... View MoreDate Issued
    2011 (2)
    Has File(s)Yes (2)

    etd@IISc is a joint service of SERC & J R D Tata Memorial (JRDTML) Library || Powered by DSpace software || DuraSpace
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