Now showing items 1-4 of 4
A Systematic Approach To Synthesis Of Verification Test-Suites For Modular SoC Designs
SoCs (System on Chips) are complex designs with heterogeneous modules (CPU, memory, etc.) integrated in them. Veriﬁcation is one of the important stages in designing an SoC. Veriﬁcation is the process of checking if the ...
Timing-Driven Routing in VLSI Physical Design Under Uncertainty
The multi-net Global Routing Problem (GRP) in VLSI physical design is a problem of routing a set of nets subject to limited resources and delay constraints. Various state-of-the-art routers are available but their main ...
Clustering for Model Reduction of Circuits : Multi-level Techniques
Miniaturisation of electronic chips poses challenges at the design stage. The progressively decreasing circuit dimensions result in complex electrical behaviour that necessitates complex models. Simulation of complex circuit ...
Analysis Of Electromagnetic Pulse Simulators
Electromagnetic pulse simulators are essential for testing the ability of electronic devices to withstand high intensity electromagnetic ends. This work presents the analysis of various parallel plate transmission lines ...