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dc.contributor.advisorSrikant, Y N
dc.contributor.authorArun, R
dc.date.accessioned2013-05-29T09:26:38Z
dc.date.accessioned2018-07-31T04:38:21Z
dc.date.available2013-05-29T09:26:38Z
dc.date.available2018-07-31T04:38:21Z
dc.date.issued2013-05-29
dc.date.submitted2011-06
dc.identifier.urihttp://etd.iisc.ac.in/handle/2005/2013
dc.identifier.abstracthttp://etd.iisc.ac.in/static/etd/abstracts/2607/G24977-Abs.pdfen_US
dc.description.abstractHigh power dissipation and on-chip temperature limit performance and affect reliability in modern microprocessors. For servers and data centers, they determine the cooling cost, whereas for handheld and mobile systems, they limit the continuous usage of these systems. For mobile systems, energy consumption affects the battery life. It can not be ignored for desktop and server systems as well, as the contribution of energy continues to go up in organizations’ budgets, influencing strategic decisions, and its implications on the environment are getting appreciated. Intelligent trade-offs involving these quantities are critical to meet the performance demands of many modern applications. Dynamic Voltage and Frequency Scaling (DVFS) offers a huge potential for designing trade-offs involving energy, power, temperature and performance of computing systems. In our work, we propose and evaluate DVFS schemes that aim at minimizing energy consumption while meeting a performance constraint, for both sequential and parallel applications. We propose a Petri net based program performance model, parameterized by application properties, microarchitectural settings and system resource configuration, and use this model to find energy efficient DVFS settings. We first propose a DVFS scheme using this model for sequential programs running on single core multiple clock domain (MCD) processors, and evaluate this on a MCD processor simulator. We then extend this scheme for data parallel (Single Program Multiple Data style) applications, and then generalize it for stream applications as well, and evaluate these two schemes on a full system CMP simulator. Our experimental evaluation shows that the proposed schemes achieve significant energy savings for a small performance degradation.en_US
dc.language.isoen_USen_US
dc.relation.ispartofseriesG24977en_US
dc.subjectDynamic Voltageen_US
dc.subjectFrequency Scalingen_US
dc.subjectPetri Net Modelen_US
dc.subjectMobile Telephonesen_US
dc.subjectCellular Telephonesen_US
dc.subjectBatteries (Electric)en_US
dc.subjectDynamic Voltage and Frequency Scaling (DVFS)en_US
dc.subjectStream Programsen_US
dc.subjectMultiple Clock Domain (MCD)en_US
dc.subjectPetri Netsen_US
dc.subjectData Parallel Programsen_US
dc.subjectMultithreaded Programsen_US
dc.subject.classificationElectronic Engineeringen_US
dc.titlePetri Net Model Based Energy Optimization Of Programs Using Dynamic Voltage And Frequency Scalingen_US
dc.typeThesisen_US
dc.degree.namePhDen_US
dc.degree.levelDoctoralen_US
dc.degree.disciplineFaculty of Engineeringen_US


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