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Now showing items 81-90 of 1257
Studies In Micro Interconnections In Printed Wiring Board
(2010-08-30)
Trend towards downsizing the product size and at the same time to bring more functionality in electronic products, demands electrically interconnecting several miniaturized electronic components with high counts of I\Os ...
Modeling, Optimization And Design Of A Solar Thermal Energy Transport System For Hybrid Cooking Application
(2013-06-12)
Cooking is an integral part of each and every human being as food is one of the basic necessities for living. Commonly used sources of energy for cooking are firewood, crop residue, cow dung, kerosene, electricity, liquefied ...
Formal Verification Of Analog And Mixed Signal Designs Using Simulation Traces
(2011-07-08)
The conventional approach to validate the analog and mixed signal designs utilizes extensive SPICE-level simulations. The main challenge in this approach is to know when all important corner cases have been simulated. An ...
Throughput Of Wireless Mesh Networks : An Experimental Study
(2013-04-26)
Mesh network is gaining importance as the next generation network for many high speed applications such as multimedia streaming. This is because it is easy and inexpensive to setup mesh networks with mobile and PDA devices ...
Testing Of Analog Circuits - Built In Self Test
(2009-03-19)
On chip Built In Self Test (BIST) is a cost-effective test methodology for highly complex VLSI devices like Systems On Chip (SoC). This work deals with cost-effective BIST methods and Test Pattern Generation (TPG) schemes ...
Chaos In Switched Mode D.C - D.C Converters
(2012-06-04)
Distributed Wireless Networks : Link Scheduling And Application Delay Modelling
(2013-05-23)
We address several problems that arise in a multihop wireless mesh network. First, we study the problem of joint congestion control, routing and MAC layer scheduling. We formulate the problem as an aggregate utility ...
Design & Implementation Of Low Power Sigma Delta ADCs For Wide Band Applications
(2013-06-13)
This thesis focuses on the design and implementation of low power Σ∆ ADCs in 130 nanometer CMOS technology. The design issues in the implementation of a third order ADC with a multi-bit and single bit quantizer are discussed. ...