Automatic Generation Of Compiled Cycle Level Microarchitecture Simulators For Superspeculative Processors
| dc.contributor.advisor | Jacob, Matthew | |
| dc.contributor.author | Chandran, Priya | |
| dc.date.accessioned | 2011-07-25T05:17:01Z | |
| dc.date.accessioned | 2018-07-31T05:08:58Z | |
| dc.date.available | 2011-07-25T05:17:01Z | |
| dc.date.available | 2018-07-31T05:08:58Z | |
| dc.date.issued | 2011-07-25 | |
| dc.date.submitted | 2004 | |
| dc.identifier.uri | https://etd.iisc.ac.in/handle/2005/1308 | |
| dc.identifier.abstract | http://etd.iisc.ac.in/static/etd/abstracts/1697/G18791-Abs.pdf | en_US |
| dc.language.iso | en_US | en_US |
| dc.relation.ispartofseries | G18791 | en_US |
| dc.subject | Microprocessors - Simulation | en_US |
| dc.subject | Compilers | en_US |
| dc.subject | Microarchitecture Simulators | en_US |
| dc.subject | August System | en_US |
| dc.subject | Processor Simulators | en_US |
| dc.subject | Automatic Simulator Generator | en_US |
| dc.subject.classification | Computer Science | en_US |
| dc.title | Automatic Generation Of Compiled Cycle Level Microarchitecture Simulators For Superspeculative Processors | en_US |
| dc.type | Thesis | en_US |
| dc.degree.name | PhD | en_US |
| dc.degree.level | Doctoral | en_US |
| dc.degree.discipline | Faculty of Engineering | en_US |